Wafer level chip scale packaged micro-electro-mechanical-system (MEMS) device and methods of producing thereof

• US 9,682,854 B2
• Filed: 04/10/2015
• Issued: 06/20/2017
• Est. Priority Date: 04/10/2015
• Status: Active Grant

• Current Assignee: Memsic Semiconductor (Wuxi) Co., Ltd. (MZ Investment Holdings Ltd.)
• Original Assignee: Memsic Incorporated (MZ Investment Holdings Ltd.)
• Inventors: Man, Piu Francis, Cheng, Anru Andrew
• Primary Examiner(s): Gumedzoe, Peniel M
• Application Number:
  US14/683,444
• Publication Number:
  US 20160297674A1
• Time in Patent Office: 802 Days
• CPC Class Codes: B81B 2207/012 the micromechanical device and the control or processing electronics being separate parts in the same package
• CPC Class Codes: B81B 2207/095 through the lid
• CPC Class Codes: B81B 2207/097 Interconnects arranged on the substrate or the lid, and covered by the package seal
• CPC Class Codes: B81B 7/007 Interconnections between the MEMS and external electrical signals
• CPC Class Codes: B81B 7/0077 Other packages not provided for in groups B81B7/0035 - B81B7/0074
• CPC Class Codes: B81C 1/00293 maintaining a controlled atmosphere with processes not provided for in B81C1/00285
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B81C 2203/0145 Hermetically sealing an opening in the lid
• CPC Class Codes: B81C 2203/0792 Forming interconnections between the electronic processing unit and the micromechanical structure
• CPC Class Codes: H01L 2224/11 Manufacturing methods

Abstract

Packaged MEMS devices are described. One such device includes a substrate having an active surface with an integrated circuit. Two substrate pads are formed on the substrate; one pad is a closed ring pad. The device also includes a cap wafer with two wafer pads. One of these wafer pads is also a closed ring pad. A hermetic seal ring is formed by a first bonding between the two ring pads. The device has a gap between the substrate and the cap wafer. This gap may be filled with a pressurized gas. An electrical connection is formed by a second bonding between one substrate pad and one wafer pad. An electrical contact is disposed over the cap wafer. The device also includes an insulation layer between the electrical contact and the cap wafer. Methods of producing the packaged MEMS devices are also described.

Claims

1. A packaged micro-electro-mechanical-system (MEMS) device comprising:

a silicon substrate having a first surface, and a second surface, wherein the second surface is on a side opposite the first surface;

at least one top substrate pad formed on said first surface;

an integrated circuit substrate having at least one bottom substrate pad bonded to the at least one top substrate pad;

at least one recess in the silicon substrate;

at least one other recess in the integrated circuit substrate, wherein the at least one recess in the silicon substrate and the at least one other recess in the integrated circuit substrate define at least one cavity, wherein the at least one cavity is filled with a pressurized gaseous species and a pressure of the gaseous species ranges from one of;

1 bar to 10 bar;

1 bar to 5 bar; and

1 bar to 3 bar;

at least one through silicon via (TSV) formed through the silicon substrate, the at least one TSV being connected to the at least one top substrate pad, wherein said at least one TSV comprises a linear passivation layer, a conductive material, and a filling material, wherein the linear passivation layer is disposed on the silicon substrate along sidewalls of the at least one TSV, and the conductive material is disposed on the linear passivation layer in the at least one TSV;

a metal layer formed over the second surface and disposed over the at least one TSV;

at least one electrical bump formed over the metal layer on the second surface of said silicon substrate, wherein each of the at least one electrical bump is in electrical contact with the metal layer, the conductive material in the at least one TSV, and the at least one top substrate pad; and

a substrate passivation layer formed between the metal layer and said silicon substrate.

2. The packaged MEMS device according to claim 1, wherein the conductive material comprises one of:

in-situ doped polysilicon and copper.

3. The packaged MEMS device according to claim 1, wherein the at least one top substrate pad is a first-level metal layer of a standard complementary metal-oxide-semiconductor (CMOS) process.

4. The packaged MEMS device according to claim 1, wherein the at least one bottom substrate pad is bonded to the at least one top substrate pad using one of:

a eutectic bonding and a metal diffusion bonding.

5. The packaged MEMS device according to claim 1, wherein the at least one bottom substrate pad is bonded to the at least one top substrate pad using an adhesion layer bonding.

6. The packaged MEMS device according to claim 5, wherein the adhesion layer bonding comprises an epoxy.

7. The packaged MEMS device according to claim 1, wherein the conductive material comprises in-situ doped polysilicon and copper.

8. The packaged MEMS device according to claim 1, wherein the pressure of the gaseous species ranges from 1 bar to 10 bar.

9. The packaged MEMS device according to claim 1, wherein the pressure of the gaseous species ranges from 1 bar to 3 bar.

10. The packaged MEMS device according to claim 1, wherein the linear passivation layer is further disposed on the first surface of the silicon substrate.

11. The packaged MEMS device according to claim 1, wherein the at least one TSV has a depth from 10 um to 600 um.

12. The packaged MEMS device according to claim 1, wherein the filling material in the at least one TSV comprising a non-conductive filling material.

13. The packaged MEMS device according to claim 1, wherein the filling material in the at least one TSV comprising a conductive filling material.

14. The packaged MEMS device according to claim 1, wherein the at least one top substrate pad forms an electrical interconnect.

15. The packaged MEMS device according to claim 1, wherein the metal layer formed over the second surface is at least a part of a redistribution layer.