Semiconductor device and method for fabricating the same

• US 9,865,495 B2
• Filed: 07/26/2016
• Issued: 01/09/2018
• Est. Priority Date: 11/05/2015
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Ki-Il, Park, Gi-Gwan, You, Jung-Gun, Kim, Hyung-Dong, Sung, Sug-Hyun, Um, Myung-Yoon
• Primary Examiner(s): Vu, Vu A
• Application Number:
  US15/220,094
• Publication Number:
  US 20170133264A1
• Time in Patent Office: 532 Days
• Field of Search: 438438
• CPC Class Codes: H01L 21/76229 Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
• CPC Class Codes: H01L 21/823431 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 21/823821 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/6681 using dummy structures having essentially the same shape as the semiconductor body, e.g. to provide stability
• CPC Class Codes: H01L 29/7843 the means being an applied insulating layer
• CPC Class Codes: H01L 29/7853 the body having a non-rectangular crossection
• CPC Class Codes: H10B 10/12 comprising a MOSFET load element

Abstract

A method of fabricating a semiconductor device includes forming a plurality of mask patterns comprising a real mask pattern and a dummy mask pattern on a substrate, removing the dummy mask pattern and etching the substrate using the real mask pattern as a mask to form a first trench, a second trench, and a fin-type pattern defined by the first trench and the second trench. The second trench contacting the fin-type pattern comprises a smooth pattern which is convex and positioned between a bottom surface and a side surface of the second trench, a first concave portion which is positioned between the side surface of the second trench and the smooth pattern, and a second concave portion which is positioned between the convex portion and the bottom surface of the second trench.

Claims

1. A method for fabricating a semiconductor device, the method comprising:

forming a plurality of mask patterns comprising a real mask pattern and a dummy mask pattern on a semiconductor substrate of the semiconductor device;

removing the dummy mask pattern, wherein removing the dummy mask pattern forms a preliminary trench in the semiconductor substrate; and

then

etching the semiconductor substrate using the real mask pattern as a mask to form a first trench, a second trench having a depth greater than the first trench, and a fin-type pattern defined by the first trench and the second trench;

wherein the second trench contacts the fin-type pattern and comprises a smooth pattern which is convex and is positioned between a bottom surface and a side surface of the second trench, a first concave portion which is positioned between the side surface of the second trench and the smooth pattern, and a second concave portion which is positioned between the smooth pattern and the bottom surface of the second trench.

2. The method of claim 1, wherein an upper surface of the smooth pattern is lower than a bottom surface of the first trench.

3. The method of claim 1, wherein a slope of a surface of the smooth pattern is continuous.

4. The method of claim 1, wherein a width of the first trench is less than a width of the second trench.

5. The method of claim 1, wherein the plurality of mask patterns are spaced apart from one another by a predetermined pitch.

6. The method of claim 1, wherein forming the first trench and the second trench comprises:

first etching the semiconductor substrate to form a pre-first trench; and

second etching a bottom surface of the pre-first trench more deeply to form the first trench.

7. The method of claim 1, further comprising conformally forming a first liner comprising a polysilicon on the fin-type pattern.

8. The method of claim 7, further comprising, before forming the first liner, conformally forming a second liner comprising an oxide film on a surface of the fin-type pattern.

9. The method of claim 1, wherein the first trench and the second trench are formed simultaneously.

10. A method for fabricating a semiconductor device, the method comprising:

forming a mask pattern having a predetermined pitch on a semiconductor substrate of the semiconductor device, wherein the mask pattern comprises a real mask pattern and a dummy mask pattern;

removing the dummy mask pattern to form a pre-second trench in the semiconductor substrate and a sharp pattern in the semiconductor substrate and protruding therefrom between the pre-second trench and the real mask pattern; and

then

etching the semiconductor substrate using the real mask pattern as a mask to form a first trench, a second trench formed by increasing a depth of the pre-second trench, and a smooth pattern formed by increasing a smoothness of a surface of the sharp pattern, wherein the smooth pattern is convex and is positioned between a bottom and a side surface of the second trench.

11. The method of claim 10, wherein a height of an upper surface of the sharp pattern is higher than, or same as an upper surface of the smooth pattern.

12. The method of claim 10, wherein removing the dummy mask pattern is performed without removing portions of the semiconductor substrate exposed by the real mask pattern, and wherein etching the semiconductor substrate to form the first trench, and forming the second trench by increasing a depth of the pre-second trench are performed simultaneously.

13. The method of claim 10, wherein forming the first trench and the second trench comprises forming a fin-type pattern defined by the first trench and the second trench, and

the method further comprises forming a device isolating film filling at least a portion of the first trench and at least a portion of the second trench.

14. The method of claim 13, wherein forming the device isolating film comprises:

forming the device isolating film entirely filling the first trench and the second trench, and

removing a portion of the device isolating film to expose an upper portion of the fin-type pattern.

15. The method of claim 14, further comprising, before removing the portion of the device isolating film, annealing the device isolating film to cause the fin-type pattern to be inclined to one side.

16. The method of claim 10, wherein forming the first trench and the second trench comprises:

forming a fin-type pattern defined by the first trench and the second trench, and

forming the smooth pattern comprises;

forming a first concave portion which is between the fin-type pattern and the smooth pattern, and a second concave portion which is between the bottom of the second trench and the smooth pattern.

17. A method of fabricating a semiconductor device, the method comprising:

forming mask patterns on a semiconductor substrate of the semiconductor device;

performing an etch process comprising;

selectively removing at least one of the mask patterns to define a preliminary trench in the semiconductor substrate adjacent remaining ones of the mask patterns without removing the semiconductor substrate therebetween, wherein edges of the preliminary trench define sharp patterns in the semiconductor substrate and protruding therefrom; and

then

etching the semiconductor substrate between the remaining ones of the mask patterns to define fin-type patterns protruding from the semiconductor substrate and a shallow trench therebetween, wherein the etching dulls the sharp patterns and increases a depth of the preliminary trench to define a deep trench in the semiconductor substrate adjacent one of the fin-type patterns; and

responsive to performing the etch process, forming device isolating patterns in the shallow trench and in the deep trench.

18. The method of claim 17, wherein, responsive to performing the etch process, a portion of the semiconductor substrate between a sidewall of the one of the fin-type patterns and a bottom surface of the deep trench defines a convex pattern.

19. The method of claim 18, wherein, responsive to performing the etch process, a portion of the semiconductor substrate between the sidewall of the one of the fin-type patterns and the convex pattern defines a first concave pattern, and wherein a portion of the semiconductor substrate between the convex pattern and the bottom surface of the deep trench defines a second concave pattern.

20. The method of claim 19, wherein the etching the semiconductor substrate between the remaining ones of the mask patterns comprises:

performing a first etch to define a preliminary shallow trench between the remaining ones of the mask patterns and to increase the depth of the preliminary trench to define a preliminary deep trench having the sharp patterns dulled at edges thereof; and

then

performing a second etch to increase respective depths of the preliminary shallow trench and the preliminary deep trench to define the shallow trench and the deep trench, respectively, such that the deep trench comprises the first concave pattern, the convex pattern, and the second concave pattern in the portions of the semiconductor substrate, respectively.

21. The method of claim 19, wherein, responsive to performing the etch process, the shallow trench between the fin-type patterns is free of a convex pattern.

22. The method of claim 18, wherein the mask patterns comprise first mask patterns on a first region of the semiconductor substrate, wherein the fin-type patterns and the shallow trench comprise first fin-type patterns and a first shallow trench, respectively, and further comprising the following prior to performing the etch process:

forming second mask patterns on a second region of the semiconductor substrate adjacent the first region, wherein the first and second mask patterns are spaced with a uniform pitch therebetween;

selectively etching the second region of the semiconductor substrate using the second mask patterns as a mask to define second fin-type patterns therein having a second shallow trench therebetween; and

forming a first device isolating film in the second shallow trench,

wherein the second shallow trench has a same depth as the first shallow trench.

23. The method of claim 22, wherein the deep trench comprises a first deep trench in the first region of the semiconductor substrate, and further comprising:

forming a second deep trench in the second region of the semiconductor substrate adjacent one of the second fin-type patterns such that a portion of the semiconductor substrate between a sidewall of the one of the second fin-type patterns and a bottom surface of the second deep trench defines a sharp pattern; and

forming a second device isolating film on the sharp pattern in the second deep trench,

wherein the second deep trench has a greater depth than the first deep trench, and

wherein the sharp pattern protrudes away from the bottom surface of the second deep trench and beyond the convex pattern.

24. The method of claim 17, wherein the device isolating patterns in the shallow trench and the deep trench comprise portions of a same low-k device isolating film.